Freescale Semiconductor /MK24F12 /FTFE /FCNFG

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Interpret as FCNFG

7 43 0 0 00 0 0 0 0 0 0 0 0 (EEERDY)EEERDY 0 (0)RAMRDY 0 (PFLSH)PFLSH 0 (0)SWAP 0 (0)ERSSUSP 0 (0)ERSAREQ 0 (0)RDCOLLIE 0 (0)CCIE

SWAP=0, RAMRDY=0, CCIE=0, ERSAREQ=0, ERSSUSP=0, RDCOLLIE=0

Description

Flash Configuration Register

Fields

EEERDY

During the reset sequence, the EEERDY flag remains clear while CCIF=0 and only sets if the FlexNVM block is partitioned for EEPROM

RAMRDY

RAM Ready

0 (0): Programming acceleration RAM is not available.

1 (1): Programming acceleration RAM is available.

PFLSH

FTFE configuration

1 (1): FTFE configuration supports four program flash blocks

SWAP

Swap

0 (0): Program flash 0 block is located at relative address 0x0000

1 (1): For devices with FlexNVM: Reserved Program flash 1 block is located at relative address 0x0000

ERSSUSP

Erase Suspend

0 (0): No suspend requested

1 (1): Suspend the current Erase Flash Sector command execution.

ERSAREQ

Erase All Request

0 (0): No request or request complete

1 (1): Request to: run the Erase All Blocks command, verify the erased state, program the security byte in the Flash Configuration Field to the unsecure state, and release MCU security by setting the FSEC[SEC] field to the unsecure state.

RDCOLLIE

Read Collision Error Interrupt Enable

0 (0): Read collision error interrupt disabled

1 (1): Read collision error interrupt enabled. An interrupt request is generated whenever an FTFE read collision error is detected (see the description of FSTAT[RDCOLERR]).

CCIE

Command Complete Interrupt Enable

0 (0): Command complete interrupt disabled

1 (1): Command complete interrupt enabled. An interrupt request is generated whenever the FSTAT[CCIF] flag is set.

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